September 2, 2026 – At the pre-show “Memory Executive Summit” of SEMICON Taiwan 2026, Samsung officially unveiled its next-generation 3D memory strategic framework, CUBE, alongside technical roadmaps for HBM5, zHBM, and zNAND-O. This series of initiatives marks Samsung’s comprehensive push to dominate the memory market in the AI era, driven by architectural innovation.
CUBE serves as the core framework for Samsung’s next-generation 3D memory strategy, with its four letters representing Capacity, Utilization, Bandwidth, and Efficiency. These four metrics precisely address the core contradictions facing memory in the AI era: how to increase capacity within limited spaces, improve utilization efficiency, expand bandwidth, and reduce power consumption simultaneously. The introduction of the CUBE strategy signifies that Samsung is shifting from merely pursuing performance parameters to adopting a system-level collaborative optimization approach.
As a continuation of the traditional HBM roadmap, Samsung plans to double the performance of the next-generation HBM5 compared to HBM4E, while improving performance per watt by 20% and reducing thermal resistance by 20%. This upgrade path maintains compatibility with existing architectures, focusing on enhancing data transmission efficiency and energy ratios to meet the continuous demand for memory bandwidth in large model training.
If HBM5 represents the continuation of the HBM roadmap, zHBM may signify an architectural leap. Traditional HBM is placed alongside GPUs and interconnected via advanced packaging. In contrast, zHBM attempts to stack HBM directly on top of GPUs, fundamentally altering signal transmission paths and thermal structures. Samsung has set highly challenging performance targets for zHBM: achieving approximately 8 times the performance of HBM4E, 3 times the performance per watt, and a 75%–90% reduction in thermal resistance. If successfully implemented, this roadmap will significantly alleviate the triple bottlenecks of bandwidth, power consumption, and heat dissipation in AI accelerators, providing a new memory architecture foundation for ultra-large-scale model training.
Addressing the rigid demand for ultra-large-scale storage driven by Large Language Models (LLMs), Samsung is simultaneously advancing the development of zNAND-O. This technology aims to achieve a bit density 10 times that of DRAM, while increasing read bandwidth and energy efficiency to 7 times that of traditional NAND. Samsung plans to begin sample shipments of zNAND-O in 2028, providing higher-density and more efficient storage options for future AI data centers.
